Job title: FPGA/Verilog Developer (SR)
Job type: Permanent
Emp type: Full-time
Industry: Finance / 金融
Functional Expertise: Technical (IT) / 技術職(IT)
Salary: Negotiable
Job published: 2026-01-28
Job ID: 69113

Job Description

Career Opportunity for a FPGA/Verilog Developer in Japan!

 

■ FPGA/Verilog Developer

 

■ Company Overview

A leading Japan-headquartered global financial services organization with a strong presence across Asia, Europe, and the Americas. The company is known for its long-standing market reputation and is currently investing heavily in technology modernization, cloud platforms, and backend engineering to support mission-critical global systems.

 

■ Your Role and Responsibilities 

● Design, implement and maintain specialized FPGA-based systems using Verilog to meet ultra-low-latency, high-throughput trading requirements.

● Work with the engineering team to produce architectural solutions that integrate FPGA design with Linux C/Java host applications.

● Develop, review and optimize FPGA designs for predictable, deterministic network packet processing and market protocol implementations (e.g., Arrowhead, OUCH, FIX etc.).

● Create and maintain testbenches, simulation suites and in lab/in field validation procedures to ensure correctness, performance and robustness under realistic market traffic.

● Support deployment, configuration and ongoing operation of FPGA systems in co located environments; provide L2/L3 support for production issues.

● Produce clear design documentation, help evolve development standards and release processes and participate in code/design reviews.

 

■ Experience and Qualifications

● Proven experience developing mid-range FPGA designs for production systems.

● Strong understanding of hardware design concepts: timing closure, pipelining, resource utilization, clock-domain crossing, signal integrity and deterministic-latency design.

● Hands-on experience with simulation and verification tools (testbenches, waveform analysis).

● Experience with FPGA toolchains (synthesis, place & route, timing analysis) from major vendors (Xilinx/AMD, Intel/Altera).

● Practical knowledge of network packet processing (Ethernet frames, IP/TCP headers and checksum handling, MAC/IP/port-based classification).

● Comfortable working with Linux-based toolchains and testing/automation facilities (PCAP analysis, Lua/Python scripting for regression tests, basic C for Linux programming, Git).

● Understanding of integrating FPGA logic with host software stacks (PCIe, kernel drivers, DMA).

 

■ Additional Preferred Qualifications

● Experience with financial market protocols (Arrowhead, OUCH, FIX, or exchange-specific binary protocols).

● Prior work on DMA/FO/STP trading systems, co located exchange connectivity, or high-frequency trading infrastructure.

 

■ Good Reasons to Join

● Collaborate with international teams across Japan, Asia, Europe, and the U.S.

 

■ Work Location

Tokyo, Japan
 

Details will be provided during the meeting.

File types (doc, docx, pdf, rtf, png, jpeg, jpg, bmp, jng, ppt, pptx, csv, gif) size up to 5MB
File types (doc, docx, pdf, rtf, png, jpeg, jpg, bmp, jng, ppt, pptx, csv, gif) size up to 5MB